1. Field of the Invention
The present invention relates generally to wafer singulation. More particularly, the present invention relates to a structure used in wafer singulation.
2. Description of the Related Art
A number of electronic component chips (hereinafter xe2x80x9cchipsxe2x80x9d) are batch processed as an array on a wafer. The wafer is then cut to singulate the wafer and to separate the chips from the wafer and each other.
For certain applications, e.g., micro-machine chips, a first surface of the chips includes a first area, also called an active area. Illustratively, the active area typically is one of various types of special-purpose devices, such as, for example, micromachines. With these chips, it is critical that the active area not be contacted and contaminated with silicon shards, particulates, or water from the singulation process. Otherwise, the active area is damaged or destroyed. Consequently, the active area must be protected from undesired contamination or contact during the wafer singulation process.
One prior art technique to protect the active area of these chips is disclosed in Roberts Jr., et al., U.S. Pat. No. 5,362,681, which is herein incorporated by reference in its. The Roberts method uses two separate layers of tape for protecting the active area of a chip during wafer singulation.
According to Roberts, precisely positioned, spaced-apart holes are mechanically punched into the first layer of tape. The punched holes in the first layer are then precisely aligned over the active areas on the front-side surface of the wafer and the first layer of tape is attached to the front-side surface of the wafer. The second layer of tape is then attached to the first layer sealing the punched holes and forming cavities over the active areas. In this manner, the two layers of tape protect the active areas. The wafer is then singulated from the back-side surface of the wafer.
It should be readily apparent that mechanically punching the holes in the first layer, precisely aligning the holes over the active areas on the front-side surface of the wafer, attaching the first layer to the front-side surface of the wafer, and attaching the second layer to the first layer to seal the holes is relatively expensive and complex. In particular, the cost of two layers of tape, which are discarded after singulation, is prohibitive in an industry as cost conscience and competitive as the electronic component packaging industry.
In addition, the time involved in placing two layers of tape, as well as the specialized machines to place the tape, also contributes to the overall cost of packaging and is inefficient at best. Consequently, a need exists for a simple, economical technique for protecting active areas on the front-side surface of a wafer from contaminants during singulation of the wafer.
In accordance with the present invention, precisely positioned, spaced-apart holes are mechanically punched into a single layer of tape. The punched holes in the single layer of tape are then precisely aligned over the active areas on a first surface of the chips on a first surface of the wafer and the single layer of tape is attached to the first surface of the wafer. Consequently, the single layer of tape on the first surface of the wafer includes tape holes positioned over the active areas of the chips that are separated, and surrounded, by tape portions attached to the non-active areas of the first surface of the chips.
Next, according to the invention, a special vacuum device, such as a custom designed vacuum chuck, is provided. One embodiment of a custom designed vacuum chuck according to the invention is created with a plurality of suction ports specifically formed to align on the single layer of tape such that the suction ports contact only the tape portions of the single layer of tape and not the tape holes. The suction ports are separated from each other by flat regions, called flats, surrounding each suction port. According to the invention, the flats of the custom vacuum chuck are precisely formed so that a perimeter of the flats contacts, and rests on, the tape portions of the single layer of tape. In addition, the flats of the custom vacuum chuck are formed so that the flats are positioned over, and cover, the entire active area on the first surface of each of the chips. Consequently, the combination of the custom vacuum chuck and the single layer of tape form a cavity over the active areas of the chips.
In this manner, according to the invention, the active surfaces of the chips on the wafer are not contacted by, contaminated by, or damaged by the custom vacuum chuck. However, since the flats of the custom vacuum chuck are formed so that the bulk of the flats are positioned over the entire active areas of the chips, the active areas on the first surface of the chips are protected from silicon shards, particulates, water and any other damage or contamination during the singulation process.
According to the invention, the individual chips are then singulated using xe2x80x9cback-sidexe2x80x9d singulation methods. Once singulated, the individual chips are removed from the single layer of tape using a pick and place machine or similar methods.
In particular, a structure according to the present invention includes a wafer, the wafer having a wafer first surface and a wafer second surface, opposite the wafer first surface. A plurality of chips are formed in the wafer first surface, each chip of the plurality of chips having a chip first surface and a chip second surface, opposite the chip first surface, an active area is formed on the chip first surface of each chip;
The structure also includes a single layer of tape, the single layer of tape including a tape first surface and a tape second surface, opposite the tape first surface. The single layer of tape further includes tape holes in the single layer of tape such that the single layer of tape consists of a plurality of tape holes extending from the tape first surface to the tape second surface, and a plurality of tape regions between the holes. The tape second surface is applied to the wafer first surface such that each of the tape holes is aligned over a corresponding one of the active areas on the chip first surfaces.
The structure of the invention further includes a vacuum device, the vacuum device having a vacuum channel, a plurality of suction ports and a plurality of flats between the suction ports. The vacuum device is positioned over the tape first surface such that the suction ports are aligned over only the tape portions surrounding the tape holes and not over the tape holes. In addition, the vacuum device is positioned such that each tape hole of the plurality of tape holes is covered by at least one of the flats of the vacuum device so that a cavity is formed over the active area of each of the chips.
Using the structure and structure of the invention, only a single layer of tape is required, i.e., attaching a second layer of tape to the first layer to seal the holes, as was done in the prior art, is eliminated. Accordingly, processing of micro-machine chips in accordance with the present invention is less complex, less labor intensive and thus less expensive than fabrication of micro-machine chips in the prior art.
These and other features and advantages of the present invention will be more readily apparent from the detailed description set forth below taken in conjunction with the accompanying drawings.